Specialization profile--Digital Systems

This profile covers theory and design methodologies of digital circuits and systems, with application areas in wireless communication, biomedical imaging based on single-photon technology, quantum computing, 3D IC design. Current areas of interest are (1) spiking neural networks and neuromorphic hardware, (2) high-level electronic (VLSI) system level design (power optimization and reduction techniques, SoC design methodology, communication architectures and protocols), and (3) physical modeling and verification of large VLSI circuits (parasitics and temperature modeling). 

Responsible professors

• Dr. Charlotte Frenkel
• Dr. Chang Gao

Compulsory courses
EE4610 Digital IC Design I
ET4351 Digital VLSI Systems on Chip

Suggested courses

CESE4035	Computer arithmetic		5 EC		details
CESE4040	Processor design project		5 EC		details
CESE4085	Modern computer architectures		5 EC		details
CESE4090	Reconfigurable Computing Design		5 EC		details
EE4615	Digital IC design II		3 EC		details
EE4690	Hardware architectures for artificial intelligence		5 EC		details
ET4362	High speed digital design for embedded systems		5 EC		details
ET4371	Mixed-mode wireless transceivers		4 EC		details

MSc project proposals

Some examples of thesis topics (this list is not exhaustive):

BE	[2022] External electronics for ultrasonically powered stimulators
ELCA	[2022] Charge-Sampling Fractional-N PLL (SiTime)
	[2022] Low-Phase-Noise VCO for Sub-10fs-Jitter PLL (SiTime)
	[2024] AI4RF: Artificial Intelligence for 6G RF Signal Processing
	[2024] OpenWiFi-DPD: An Open-Source Digital Pre-distortion In-the-loop Wi-Fi Demonstrator
SPS	Digital processing for large pixel array 3D-TOF systems

Thesis examples

BE	2021	Emmanouil (Manos) Kandilakis	Ultra-Low Energy Time-Mode ADC with Background Calibration for Biomedical Sensing Applications
ELCA	2018	Bas Stijnen	A military satellite terminal for S&F
SPS	2024	Bart Hettema	Circuits and Systems for a Spiking Neuromorphic Network in 28 nm CMOS
	2023	Tianyu Du	Digital self-timed neuron design for Spiking Neuron Networks
	2022	Jinyao Zhang	Self-timed interconnect for SNN - From Point to Point Communication to Multi-array Segmented-bus Solution
		Longxing Jiang	A New Logarithmic Quantization Technique and Corresponding Processing Element Design for CNN Accelerators
		Yichen Yang	Off-chip Self-timed SNN Custom Digital Interconnect System
		Yongkang Zhou	Modeling of router structure for SNN-applicable NoC definitions
	2021	Hanyu Ma	Hardware Spiking Neural Network based Sbox AES
	2019	Joris Coenen	A Highly Concurrent, Memory-Efficient AER Architecture for Neuro-Synaptic Spike Routing
	2017	Andrei Ardelean	Energy-efficient multipath ring network for heterogeneous clustered neuronal arrays
		He Zhang	Multi-FPGA Interconnection Simulation
		Ester Stienstra	A 32 x 32 Spiking Neural Network System On Chip
	2016	Bahador Valizadehpasha	On-Chip Cryogenic Read-Out of Spin Qubit for Quantum Computers
		Rosario Incandela	Cryogenic CMOS LNA for RF readout of spin qubits
		Preethi Padmanabhan	Design of a Sub-harmonically Injection-Locked TDC Array for Space Applications
		Arin Ülkü	High Resolution, Fully Digital Photon-Counting Image Sensors in DSM CMOS Technologies
		Kiki Wirianto	Multi-Domain SystemC Model of a Neural Interface
	2015	Guozhi Xu	Implementation of in-situ monitoring techniques for power reduction in smart sensors
		Yuteng Hao	Low power digital baseband architecture for wireless sensor nodes
		Ting Gong	Development and Characterization of an Endoscopic TOF PET System
		Martijn Bijwaard	Scalable Network Based Clock Synchronization for Digital PET System
	2014	Dali Zhang	Long-range 3D Range Detector Based on Time-correlated Single-photon Counting
		Harald Homulle	Development of a Multichannel TCSPC System in a Spartan 6 FPGA
		Jorn Zimmerling	Modeling of wave propagation in open domains: A Krylov subspace approach
		Milovan Vasic	Physical design of a 3D router: reducing the number of vertical connections and enabling asynchronous operation
	2012	Nupur Lodha	Monolithic Integration of LEDs and SPADs in Standard CMOS Technology for Optical Joystick Application
		J. Rodriguez Rodriguez de Guzman	A general RDE-based simulator for statistical timing analysis
	2011	Vashishth Chaudhri	Fundamentals, Specifications, Architecture and Hardware Towards a Navigation System Based on Radio Pulsars
		Priyanka Kumar	Time-of-Flight 3D Imaging based on a SPAD-TDC Pixel Array in Standard 65 nm CMOS Technology
		Guanyu Yi	High-Quality, Real-Time HD Video Stereo Matching on FPGA
		Harmen Menninga	Implementation, Characterization, and Optimization of an FPGA-based Time-to-Digital Converter
	2010	Ashish Nigam	Standard Cell Behavior Analysis and Waveform Set Model for Statistical Static Timing Analysis
	2009	Rahmadi Trimananda	A hierarchically pipelined data acquisition system for single-photon avalanche diode array

Contact person

For more information about the research group, possible thesis topics, and suggestions for your ISP:

dr. Charlotte Frenkel

Electronic Instrumentation Group

Department of Microelectronics