Department of Microelectronics
Faculty of Electrical Engineering, Mathematics, and Computer Science

dr.ir. A. Baiano

PhD student
Electronic Components, Technology and Materials (ECTM), Department of Microelectronics

PhD thesis (Nov 2009): Single Grain TFTs for High Speed Flexible Electronics
Promotor: Kees Beenakker, Ryoichi Ishihara

Expertise: Solid-state lighting (SSL)

Biography

Alessandro Baiano was born in Napoli, Italy, in 1979. He received his Master Science degree (cum laude) in electronics engineering from the University of Naples Federico II, Italy, in 2005, after completing his master thesis within the Department of Microelectronics and Information Technology of the Royal Institute of Technology, Stockholm, Sweden, on analysis of deep submicron fully depleted Silicon-on-Insulator MOSFETs.

In October 2005, he joined the Faculty of Electrical Engineering, Mathematics and Computer Science, Delft University of Technology, Delft, the Netherlands, where he pursued the Ph.D. degree within the Laboratory of Electronic Components, Technology and Materials of Delft Institute of Microsistems and Nanoelectronics (DIMES). His Ph.D. research was on fabrication, characterization and modeling of high-performance single-grain Thin-Film Transistors and circuit applications. He is currently working in the ENSURE project on advanced solid-state lighting (SSL) module technology and design.

Publications

  1. An approach to �Design for Reliability� in solid state lighting systems at high temperatures
    S. Tarashioon; A. Baiano; H. van Zeijl; C. Guo; S.W. Koh; W.D. van Driel; GuoQi Zhang;
    Microelectronics Reliability,
    Volume 52, Issue 5, pp. 783-793, May 2012. DOI 10.1016/j.microrel.2011.06.029.

  2. Single-Grain Germanium TFTs
    R. Ishihara; T. Chen; A. Baiano; M.R. Tajari Mofrad; C.I.M. Beenakker;
    In Y. Kuo; G. Bersuker (Ed.), ECS Transactions: Challenges Si- and Ge-based TFT Technology,
    Hong Kong, China, pp. 65-74, Jun. 2012. DOI 10.1149/1.3600725.

  3. Stacking of Single-Grain Thin-Film Transistors.
    M.R. Tajari Mofrad; J. Derakhshandeh; R. Ishihara; A. Baiano; J. van der Cingel; C.I.M. Beenakker;
    Japanese journal of applied physics,
    Volume 48, 2009. ISSN 0021-4922.

  4. Strained Single Grain Silicon n- and p-channel Thin Film Transistors by Excimer Laser
    A. Baiano; R. Ishihara; J. van der Cindel; K. Beenakker;
    Accepted IEEE Electron Device Letters,
    2009.

  5. Simulation and Experimental study of crystallographic orientation control of 2D location controlled single grain crystalline silicon
    M.R. Tajari Mofrad; R. Ishihara; J. Derakhshandeh; A. Baiano; J. van der Cingel; C.I.M. Beenakker;
    In Proc. of SAFE 2009,
    pp. 185-188, 2009.
    document

  6. Characterization of local electrical property of coincidence site lattice boundary in location-controlled silicon islands by scanning probe microscopy
    N. Matsuki; R. Ishihara; A. Baiano; Y. Hiroshima; S. Inoue; C.I.M. Beenakker;
    In Materials Research Society Symposium Proceedings,
    pp. 94-99, 2009.

  7. Integrated High Performance (100) and (110) Oriented Single-Grain Si TFTs without Seed Substrate
    T. Chen; R. Ishihara; J. van der Cingel; A. Baiano; M.R. Tajari Mofrad; H. Schellevis; C.I.M. Beenakker;
    In International Electron Devices Meeting (IEDM 2009),
    Baltimore, MD, USA: IEEE, pp. 179-182, 2009.
    document

  8. Single Grain Si TFTs for RF and 3DICs
    R. Ishihara; A. Baiano; T. Chen; J. Derakhshandeh; M.R. Tajari Mofrad; M. Danesh; N. Saputra; J. Long; C.I.M. Beenakker;
    In 2009 International Conference on Semiconductor Technology for Ultra Large Scale Integrated Circuits and Thin Film Transistors (ULSIC vs. TFT),
    Xian, China, 2009.

  9. High Performance n- and p-channel Strained Single Grain Silicon TFTs using Excimer Laser
    A. Baiano; R. Ishihara; K. Beenakker;
    In Mater. Res. Soc. Symp. Proc,
    Warrendale, PA, Materials Research Society, pp. 1-11, 2009.
    document

  10. Single grain TFTs for high speed flexible electronics
    A. Baiano;
    PhD thesis, Delft University of Technology, Nov. 2009. ISBN 978-90-8570-430-0; Promotors: prof. C.I.M. Beenakker, dr. R. Ishihara.

  11. Single-Grain Si Thin Film Transistors SPICE Model, Analog and RF Circuit Applications
    A. Baiano; M. Danesh; N. Saputra; R. Ishihara; J. Long; W. Metselaar; C.I.M. Beenakker; N. Karaki; Y. Hiroshima; S. Inoue;
    Solid State Electronics,
    Volume 52, Issue 9, pp. 1345-1352, Aug. 2008.

  12. An Assessment of angstrom micro-Czochralski, Single-Grain Silicon Thin-Film Transistor Technology for Large-Area, Sensor and 3-D Electronic Integation
    N. Saputra; M. Danesh; A. Baiano; R. Ishihara; J.R. Long; N. Karaki; S. Inoue;
    IEEE Journal of Solid-State Circuits,
    Volume 43, Issue 7, pp. 1563-1576, Jul. 2008.

  13. An Assessment of �_-Czochralski, Single-Grain Silicon Thin-Film Transistor Technology for Large-Area, Sensor and 3-D Electronic Integration
    N. Saputra; M. Danesh; A. Baiano; R. Ishihara; J. R. Long; N. Karaki; S. Inoue;
    IEEE Journal of Solid State Circuits,
    Volume 43, Issue 7, pp. 1563-1576, 2008.

  14. Formation of Location-Controlled Germanium Grains by Excimer Laser
    A. Baiano; R. Ishihara; J. van d. Cingel; K. Beenakker;
    ECS Transactions Thin Film Transistors,
    Volume 13, Issue 9, Oct. 2008.

  15. Reliability Analysis of Single Grain Si TFT using 2D Simulation
    A. Baiano; J. Tan; R. Ishihara; K. Beenakker;
    ECS Transactions Thin Film Transistors,
    Volume 13, Issue 9, Oct. 2008.

  16. Investigation of Local Electrical Properties of Coincidence-Site-Lattice Boundaries in Location-Controlled Silicon Islands Using Scanning Capacitance Microscopy
    N. Matsuki; R. Ishihara; A. Baiano; K. Beenakker;
    Applied Physics Letters,
    Volume 93, Issue 6, Aug. 2008.

  17. 2D Simulation of Hot-Carrier-Induced Degradation and Reliability Analysis for Single Grain Si TFTs
    J. Tan; A. Baiano; R. Ishihara; K. Beenakker;
    In Proceeding of SAFE,
    2008.

  18. Germanium Grains Location Control using ""angstrom""""micro""-Czochralski Process
    A. Baiano; R. Ishihara; J. van d. Cingel; K. Beenakker;
    In Proceeding of SAFE,
    2008.

  19. A Flexible Active-Matrix Electronic Paper with Integrated Display Driver using the -Czochralski Single Grain TFT Technology
    W. M. Chim; N. Saputra; A. Baiano; R. Ishihara; A. van Genderen;
    In Proceeding of PRORISC,
    2008.

  20. Monolithic 3D Integration of Single-Grain Si TFTs
    M.R. Tajari Mofrad; R. Ishihara; J. Derakhshandeh; A. Baiano; J. van der Cingel; C.I.M. Beenakker;
    In Material Research Society Symposium Proceedings,1066,A20,2008,MRS Spring Meeting,
    San Francisco, CA, USA, 2008.

  21. Single-Grain Si TFTs for Flexible Electronics and 3D-ICs
    R. Ishihara; A. Baiano; N. Saputra; M. Danesh; N. Matsuki; T. Chen; V. Rana; M. He; J. Long; Y. Hiroshima; N. Karaki; S. Inoue; C.I.M. Beenakker;
    In International TFT Conference,
    Jan. 2008.

  22. Reliability analysis of single grain Si TFT using 2D simulation
    A. Baiano; J. Tan; R. Ishihara; C.I.M. Beenakker;
    In Y Kuo (Ed.), Thin film transistors 9 (TFT 9),
    s.n., pp. 109-114, 2008.

  23. 2D simulation of hot-carrier-induced degradation and reliability analysis for single grain Si TFTs
    J. Tan; A. Baiano; R. Ishihara; C.I.M. Beenakker;
    In s.n. (Ed.), The annual workshop on semiconductor advances for future electronics and sensors,
    STW, pp. 600-603, 2008.

  24. Local electrical property of coincidence site lattice boundary in location-controlled silicon islands by scanning spread resistance microscopy
    N. Matsuki; R. Ishihara; A. Baiano; Y. Hiroshima; S. Inoue; C.I.M Beenakker;
    In Proceeding of The 14th International Display Workshops,
    pp. 489-492, 2007.

  25. Characterization of local electrical property of coincidence site lattice boundary in location-controlled silicon islands by scanning probe microscope
    N. Matsuki; R. Ishihara; A. Baiano; Y. Hiroshima; S. Inoue; C.I.M Beenakker;
    In Proceeding of SAFE,
    2007.

  26. Analog and RF Design Using the �_-Czochralski Single Grain TFT Technology
    Nitz Saputra; Mina Danesh; Alessandro Baiano; Ryoichi Ishihara; Satoshi Inoue; Nobuo Karaki; John R. Long;
    In Proceeding of PRORISC,
    2007.

  27. SPICE Modeling with NQS effect of Single-Grain Si TFTs using BSIMSOI
    Alessandro Baiano; Ryoichi Ishihara; Nobuo Karaki; Satoshi Inoue; Wim Metselaar; Kees Beenakeer;
    In Proceeding of SAFE,
    2007.

  28. Single-Grain Si Thin-Film Transistors for Analog and RF Circuit Applications
    N. Saputra; M. Danesh; A. Baiano; R. Ishihara; J.R. Long; J.W. Metselaarand; C.I.M. Beenakker; N. Karaki; Y. Hiroshima; S. Inoue;
    In Proceeding of ESSDERC 2007,
    pp. 107-110, 2007.

  29. DC modeling of Single-Grain Si TFTs using BSIMSOI
    A. Baiano; R. Ishihara; N. Karaki; S. Inoue; W. Metselaar; K. Beenakker;
    In International TFT Conference,
    pp. 200-203, Jan. 2007.

  30. SPICE Modeling of Single-Grain Si TFTs using BSIMSOI
    A. Baiano; R. Ishihara; N. Saputra; J. Long; N. Karaki; S. Inoue; W. Metselaar; K. Beenakeer;
    In ECS Transactions-ULSI vs. TFT Conference,
    Jul. 2007.

BibTeX support

Last updated: 26 Dec 2018

Alessandro Baiano

Alumnus