A Lamoral Coines

PhD student
Microwave Sensing, Signals and Systems (MS3), Department of Microelectronics

Expertise: Joint Development of Sparse Antenna Array Topology and High Resolution DoA Estimation.

Biography

Adrian Lamoral Coines was born in Algeciras, Spain, in 1995. He holds a BSc in Mobile and Space Communications Engineering and an MSc in Advanced Communication Technologies from Universidad Carlos III de Madrid (UC3M), where he was honored with the Extraordinary Award for having the top academic record in Telecommunications Engineering.

In parallel with his MSc studies, Adrian was working as a Digital Signal Processing (DSP) Research Assistant on the Madrid Flight on Chip (MFoC) project, where he contributed to the development of FPGA hardware for next-generation satellite communication systems.

From October 2021 to November 2022, he served as a R&D Engineer at Huawei Munich Research Center, focusing on advanced compressive sensing algorithms for 5G mmWave communications. During this period, he enhanced his expertise in Array Signal Processing, Compressive Sensing and Tensor Algebra applied to High Resolution DoA Estimation.

From December 2022 to September 2024, Adrian was employed as a R&D 5G FPGA Engineer at Keysight Technologies in Malaga, Spain, where he implemented DSP algorithms in VHDL for 5G V2X communications.

In October 2024, he joined the Microwave Sensing Signals & Systems (MS3) research group at TU Delft as a PhD candidate. His interdisciplinary research project, titled "Joint Development of Sparse Antenna Array Topology and High Resolution DoA Estimation," is co-supervised by Dr. Yanki Aslan and NXP Semiconductors.

Publications

  1. Compressive Sensing Based High-Resolution DoA Estimation by Beamspace Covariance Gradient Descent
    Yu, Zhibin; Abdelkader, Ahmed; Wu, Xiaofeng; Lamoral Coines, Adrián; Haardt, Martin;
    In 2023 IEEE 9th International Workshop on Computational Advances in Multi-Sensor Adaptive Processing (CAMSAP),
    pp. 321-325, 12 2023. DOI: 10.1109/CAMSAP58249.2023.10403481

  2. CCSDS 131.2-B-1 Transmitter Design on FPGA with Adaptive Coding and Modulation Schemes for Satellite Communications
    Lamoral Coines, Adrián; Jiménez, Víctor P. Gil;
    Electronics,
    Volume 10, Issue 20, 2021. DOI: 10.3390/electronics10202476
    Abstract: ... Satellite communications are a well-established research area in which the main innovation of last decade has been the use of multi-carrier modulations and more robust channel coding techniques. However, in recent years, novel advanced signal processing has started being developed for these communications due to the increase in the signal processing capacity of transmitters and receivers. Although signal processing capabilities are increasing, they are still constrained by large limitations because these techniques need to be implemented in real hardware, thus making complexity a matter of critical importance. Therefore, this paper presents the design and implementation of a transmitter with adaptable coding and modulation on a field-programmable-gate-array (FPGA). The main motivation came from the standard CCSDS 131.2-B-1 which recommends that such a novel transmitter which has to date not been implemented in a real system The system was modeled by MATLAB with the purpose of being programmed in VHDL following the AXI-stream protocol between components. Behavioral simulation results were obtained in VIVADO and compared with MATLAB for verification purposes. The transmitter logical circuit was synthesized in a FPGA Zynq Ultrascale RFSoC ZU28DR, showing low resource consumption and correct functioning, leading us to conclude that the deployment of new communication systems in state-of-the-art hardware in satellite communications is justified.

    document

BibTeX support

Last updated: 4 Oct 2024

Adrian Lamoral Coines