René van Leuken

Publications

  1. A sub-nW neuromorphic receptors for wide-range temporal patterns of post-synaptic responses in 65 nm CMOS
    X. You; A. Zjajo; S. Kumar; R. van Leuken;
    Analog Integrated Circuits and Signal Processing,
    2018. DOI: 10.1007/s10470-018-1276-4
    document

  2. A real-time reconfigurable architecture for large-scale biophysically-accurate neuron simulation
    A. Zjajo; J. Hofmann; G.J. Christiaanse; M. van Eijk; G. Smaragdos; C. Strydis; A. de Graaf; C. Galuzzi; R. van Leuken;
    IEEE Transactions on Biomedical Circuits and Systems,
    Volume 12, Issue 2, pp. 326-337, 2018. DOI: 10.1109/TBCAS.2017.2780287
    document

  3. Real-Time Multi-Chip Neural Network for Cognitive Systems
    A. Zjajo; R. van Leuken (Ed.);
    Delft, The Netherlands: River Publishers, , 2018. ISBN 978-87-702-2034-7.
    document

  4. Energy-Efficient Multipath Ring Network for Heterogeneous Clustered Neuronal Arrays
    A. Ardelean; A. Zjajo; S.S. Kumar; R. van Leuken;
    In IEEE Biomedical and Health Informatics (BHI),
    Las Vegas (USA), IEEE, pp. 190-193, March 2018. DOI: 10.1109/BHI.2018.8333401
    document

  5. Multi-layer neuromorphic synapse for reconfigurable networks
    A. Zjajo; S. Kumar; R. van Leuken;
    In IEEE International Conference on Signal Processing,
    Beijing, China, pp. 997-1000, 2018.
    document

  6. Uncertainty in noise-driven steady-state neuromorphic network for ECG data classificaiton
    A. Zjajo; J. Mes; E. Kolagasiogly; S. Kumar; R. van Leuken;
    In IEEE International Symposium on Computer Based Medical Systems,
    Karlstad, Sweden, pp. 434-435, 2018. ISSN 2372-9198. DOI: 10.1109/CBMS.2018.00082
    document

  7. Fighting Dark Silicon: Toward Realizing Efficient Thermal-Aware 3-D Stacked Multiprocessors
    S.S. Kumar; A. Zjajo; T.G.R.M. van Leuken;
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
    Volume 25, Issue 4, pp. 1549-1562, 2017. ISSN 1063-8210. DOI: 10.1109/TVLSI.2016.2642587
    document

  8. Immediate Neighborhood Temperature Adaptive Routing for Dynamically Throttled 3-D Networks-on-Chip
    S. S. Kumar; A. Zjajo; R. van Leuken;
    IEEE Transactions on Circuits and Systems II: Express Briefs,
    Volume 64, Issue 7, pp. 782-786, July 2017. ISSN 1549-7747. DOI: 10.1109/TCSII.2015.2503613
    document

  9. Digital Spiking Neuron Cells for Real-Time Reconfigurable Learning Networks
    Haipeng Lin; A. Zjajo; R. van Leuken;
    In 30th IEEE International System-on-Chip Conference (SOCC),
    Arlington (VA), September 2017. DOI: 10.1109/SOCC.2017.8226029
    document

  10. An intrinsically linear wideband digital polar PA featuring AM-AM and AM-PM corrections through nonlinear sizing, overdrive-voltage control, and multiphase RF clocking
    M. Hashemi; Y. Shen; M. Mehrpoo; M. Acar; R. van Leuken; M. S. Alavi; L. de Vreede;
    In 2017 IEEE International Solid-State Circuits Conference (ISSCC),
    pp. 300-301, February 2017. DOI: 10.1109/ISSCC.2017.7870380
    document

  11. A fully-integrated digital-intensive polar Doherty transmitter
    Y. Shen; M. Mehrpoo; M. Hashemi; M. Polushkin; L. Zhou; M. Acar; R. van Leuken; M. S. Alavi; L. de Vreede;
    In 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
    pp. 196-199, June 2017. DOI: 10.1109/RFIC.2017.7969051
    document

  12. A wideband linear direct digital RF modulator using harmonic rejection and I/Q-interleaving RF DACs
    M. Mehrpoo; M. Hashemi; Y. Shen; R. van Leuken; M. S. Alavi; L. C. N. de Vreede;
    In 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
    pp. 188-191, June 2017. DOI: 10.1109/RFIC.2017.7969049
    document

  13. Neuromorphic spike data classifier for reconfigurable brain-machine interface
    A. Zjajo; S. Kumar; R. van Leuken;
    In 2017 8th International IEEE/EMBS Conference on Neural Engineering (NER),
    pp. 150-153, May 2017. DOI: 10.1109/NER.2017.8008314
    document

  14. Neuromorphic Self-Organizing Map Design for Classification of Bioelectric-Timescale Signals
    J. Mes; E. Stienstra; Xuefei You; S. Kumar; A. Zjajo; C. Galuzzi; R. van Leuken;
    In Int. Conf. on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS XVII),
    July 2017.

  15. Energy-Efficient Neuromorphic Receptors for Wide-Range Temporal Patterns of Post-Synaptic Responses
    Xuefei You; A. Zjajo; S. S. Kumar; R. van Leuken;
    In IEEE Nordic Circuits and Systems Conference (2017 NorCAS),
    Linkoping (Sweden), October 2017. DOI: 10.1109/NORCHIP.2017.8124951
    document

  16. An intrinsically linear wideband digital polar PA featuring AM-AM and AM-PM corrections through nonlinear sizing, overdrive-voltage control, and multiphase RF clocking
    M. Hashemi; Y. Shen; M. Mehrpoo; M. Acar; R. van Leuken; M.S. Alavi; L.C.N de Vreede;
    In ISSCC,
    pp. 300-301, Feb 2017.

  17. A wideband linear direct digital RF modulator using harmonic rejection and I/Q-interleaving RF DACs
    Mehrpoo, M.; Hashemi, M.; Shen, Y.; van Leuken, R.; Alavi, M. S.; de Vreede, L. C. N.;
    In 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
    pp. 188-191, 2017. DOI: 10.1109/RFIC.2017.7969049

  18. Exploration of the thermal design space in 3D integrated circuits
    S.S. Kumar; A. Zjajo; R. van Leuken;
    In Physical Design for 3D Integrated Circuits,
    CRC Press, 2016. ISBN: 978-1-4987-1037-4.

  19. Thermal expansion and aging effects in neuromorphic signal processor
    A. Zjajo; R. van Leuken;
    In Nanoelectronics Conference (INEC), 2016 IEEE International,
    Chengdu, China, IEEE, pp. 1--2, 2016. DOI: 10.1109/INEC.2016.7589259
    document

  20. A 2.7 muW 10b 640kS/s time-based A/D converter for implantable neural recording interface
    A. Zjajo; S. Astigimath; R. van Leuken;
    In Circuits and Systems (ISCAS), 2016 IEEE International Symposium on,
    IEEE, pp. 1074--1077, 2016. DOI: 10.1109/ISCAS.2016.7527430
    document

  21. A 2.1 muW/channel current-mode integrated neural recording interface
    A. Zjajo; R. van Leuken;
    In 2016 IEEE-EMBS International Conference on Biomedical and Health Informatics (BHI),
    IEEE, pp. 505--508, 2016. DOI: 10.1109/BHI.2016.7455945
    document

  22. A 41 muW real-time adaptive neural spike classifier
    A. Zjajo; R. van Leuken;
    In 2016 IEEE-EMBS International Conference on Biomedical and Health Informatics (BHI),
    IEEE, pp. 489--492, 2016. DOI: 10.1109/BHI.2016.7455941
    document

  23. A real-time hybrid neuron network for highly parallel cognitive systems
    G.J. Christiaanse; A. Zjajo; C. Galuzzi; R. van Leuken;
    In Engineering in Medicine and Biology Society (EMBC), 2016 IEEE 38th Annual International Conference of the,
    IEEE, pp. 792--795, 2016. DOI: 10.1109/EMBC.2016.7590820
    document

  24. Multi-chip dataflow architecture for massive scale biophysically accurate neuron simulation
    J. Hofmann; A. Zjajo; C. Galuzzi; R. van Leuken;
    In IEEE International Conference of the IEEE Engineering in Medicine and Biology Society,
    Orlando, Florida, pp. 5829-5832, 2016.
    document

  25. Determining Performance Boundaries on High-Level System Specifications
    W. van Teijlingen; R. van Leuken; C. Galuzzi; B. Kienhuis;
    In Proc. 19th International Workshop on Software and Compilers for Embedded Systems,
    ACM, pp. 90-97, 2016.
    document

  26. Immediate neighborhood temperature adaptive routing for 3D networks-on-chip
    S. Kumar; A. Zjajo; R. van Leuken;
    IEEE Transactions on Circuits and Systems-II: Express Briefs,
    2015. DOI: 10.1109/TCSII.2015.2503613
    document

  27. Thermal Design of 3D Systems-on-Chip
    S. S. Kumar; A. Zjajo; R. van Leuken;
    In Physical Design for 3D Integrated Circuits,
    CRC Press, 2015. DOI: 978-87-929-8271-1
    document

  28. Physical characterization of steady-state temperature profiles in three-dimensional integrated circuits
    S. Kumar; A. Zjajo; R. van Leuken;
    In IEEE International Symposium on Circuits and Systems,
    Lisbon, Portugal, pp. pp. 1969-1972, 2015.
    document

  29. Ctherm: A integrated framework for thermal-functional co-simulation of systems-on-chip
    S. Kumar; A. Zjajo; R. van Leuken;
    In IEEE International Conference on Parallel, Distributed and Network-based Processing,
    Turku, Finland, pp. pp. 674-681, 2015.
    document

  30. Multi-domain SystemC model of 128-channel time-multiplexed brain-machine interface
    K. Wirianto; A. Zjajo; C. Galuzzi; R. van Leuken;
    In IEEE International Conference on Embedded Computer Systems,
    Samos, Greece, pp. pp. 295-302, 2015.
    document

  31. Noise analysis of programmable gain analog to digital converter for integrated neural implant front end
    A. Zjajo; C. Galuzzi; R. van Leuken;
    In IEEE International Conference on Biomedical Electronics and Devices,
    Lisbon, Portugal, pp. pp. 5-12, 2015.
    document

  32. Stochastic noise analysis of neural interface front end
    A. Zjajo; C. Galuzzi; R. van Leuken;
    In IEEE International Symposium on Circuits and Systems,
    Lisbon, Portugal, pp. pp. 169-172, 2015.
    document

  33. Sequential power per area optimization of multichannel neural recording interface based on dual quadratic programming
    A. Zjajo; C. Galuzzi; R. van Leuken;
    In IEEE International Conference on Neural Engineering,
    Montpellier, France, pp. pp. 9-12, 2015.
    document

  34. A 31 pJ/spike hybrid stochastic neuromorphic signal processor
    A. Zjajo; C. Galuzzi; R. van Leuken;
    In IEEE Signal Processing in Medicine and Biology Symposium,
    Philadelphia, USA, pp. pp. 1-2, 2015.
    document

  35. Frequency response mismatch correction in multichannel time interleaved analog bemformers for ultrasound medical imaging
    A. Zjajo; R. van Leuken;
    In IEEE International Conference on Bioinformatics and Biomedical Engineering,
    Shangai, China, pp. pp. 341-348, 2015.
    document

  36. Parallel Channel Estimator and Equalizer for Mobile OFDM Systems
    Yongfeng Guan; Tao Xu; R. van Leuken; Manyi Qian;
    Circuits Syst Signal Process.,
    Volume 33, pp. 839-861, March 2014. DOI: 10.1007/s00034-013-9664-6
    document

  37. System fault-tolerance analysis of COTS-based satellite on-board computers
    D. Burlyaev; T.G.R.M. van Leuken;
    Microelectronics Journal,
    Volume 45, Issue 10, pp. 1335-1341, October 2014. DOI: 10.1016/j.mejo.2014.01.007
    document

  38. Pronto: A Low Overhead Message Passing System for High Performance Many-Core Processors
    S.S. Kumar; Mitzi Tijin-A-Djie; T.G.R.M. van Leuken;
    International Journal of Networking and Computing,
    Volume 4, Issue 2, pp. 307-320, July 2014. ISSN 2185-2839.
    document

  39. A System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3D MP-SoCs
    S.S. Kumar; A. Aggarwal; R. Jagtap; A. Zjajo; R. van Leuken;
    IEEE Tr. Very Large Scale Integration (VLSI) Systems,
    Volume 22, pp. 1606-1619, 2014.

  40. Dynamic Thermal Estimation Methodology for High Performance 3D MPSoC
    A. Zjajo; N.P. van der Meijs; R. van Leuken;
    IEEE Tr. Very Large Scale Integration (VLSI) Systems,
    Volume 22, pp. 1920-1933, 2014.

  41. Improving data cache performance using Persistence Selective Caching
    S.S. Kumar; T.G.R.M. van Leuken;
    In IEEE Int. Conf. Circuits and Systems (ISCAS),
    Melbourne, Australia, IEEE, pp. 1945-1948, June 2014. DOI: 10.1109/ISCAS.2014.6865542
    document

  42. ESL design of customizable real-time neuron networks
    M. van Eijk; C. Galuzzi; A. Zjajo; G. Smargdos; C. Strydis; R. van Leuken;
    In IEEE Biomedical Circuits and Systems Conference,
    Lausanne, Switzerland, pp. 1-4, 2014.

  43. Statistical power optimization of deep-dubmicron digital CMOS circuits based on structured perceptron
    A. Zjajo; N. van der Meijs; R. van Leuken;
    In IEEE International Symposium on Integrated Circuits,
    Singapore, pp. pp. 1-4, 2014.

  44. A System Level Methodology for Interconnect Aware and Temperature Constrained Power Management of 3D MP-SoCs
    S. Kumar; A. Aggarwal; R. Jagtap; A. Zjajo; R. van Leuken;
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
    2013. in press.
    document

  45. Adaptive Thermal Monitoring of Deep-Submicron CMOS VLSI Circuits
    A. Zjajo; N.P. van der Meijs; R. van Leuken;
    Journal of Low Power Electronics,
    Volume 9, Issue 4, pp. 403-413, December 2013.
    document

  46. Dynamic Thermal Estimation Methodology for High Performance 3D MPSoC
    A. Zjajo; N.P. van der Meijs; R. van Leuken;
    IEEE Transactions on Very Large Scale Integration (VLSI) Systems,
    2013. DOI: 10.1109/TVLSI.2013.2280667
    document

  47. Cit: A GCC Plugin for the Analysis and Characterization of Data Dependencies in Parallel Programs
    S.S. Kumar; A. Chahar; R. van Leuken;
    In Int. Conf. Design of Circuits and Integrated Systems,
    San Sebastian (Spain), 2013.
    document

  48. Low Overhead Message Passing for High Performance Many-Core Processors
    S.S. Kumar; M.E. Tjin-A-Djie; R. van Leuken;
    In Int. Symp. Computing and Networking,
    Matsuyama (Japan), 2013.
    document

  49. Interconnect and Thermal Aware 3D Design Space Exploration
    S. Kumar; A. Aggarwal; R. Jagtap; A. Zjajo; R. van Leuken;
    In ICT.OPEN,
    Eindhoven, The Netherlands, 2013.
    document

  50. Balanced Stochastic Truncation of Coupled 3D Interconnect
    A. Zjajo; N. van der Meijs; R. van Leuken;
    In IEEE International Conference on IC Design and Technology,
    Pavia, Italy, pp. 13-16, 2013.
    document

  51. A Precise and High Speed Charge-Pump PLL Model Based on SystemC/SystemC-AMS
    Kezheng Ma; T.G.R.M. van Leuken; M. Vidojkovic; J. Romme; S. Rampu; H. Pflug; Li Huang; Guido Dolmans;
    Intl. Journal of Electronics and Telecommunications,
    Volume 58, Issue 3, pp. 225-231, September 2012. ISSN 0867-6747. DOI: 10.2478/v10177-012-0031-5

  52. Multi-user LEO-satellite receiver for robust space detection of AIS messages
    Mu Zhou; A.J. van der Veen; R. van Leuken;
    In Proc. IEEE ICASSP,
    Kyoto (Japan), IEEE, pp. 2529-2532, May 2012.
    document

  53. A 11 uW 0C-160C Temperature Sensor in 90 nm CMOS for Adaptive Thermal Monitoring of VLSI Circuits
    A. Zjajo; N.P. van der Meijs; T.G.R.M. van Leuken;
    In Proceedings of ISCAS 2012,
    Seoul, Korea, May 2012.
    document

  54. Thermal Analysis of 3D Integrated Circuits Based on Discontinous Galerkin Finite Element Method
    A. Zjajo; N.P. van der Meijs; T.G.R.M. van Leuken;
    In Proceedings of ISQED 2012,
    Santa Clara, CA, USA, March 2012.
    document

  55. Temperature Constrained Power Management Scheme for 3D MPSoC
    A. Aggarwal; S. Kumar; A. Zjajo; T.G.R.M. van Leuken;
    In Proceedings of SPI 2012,
    Sorrento, Italy, May 2012.
    document

  56. A Methodology for Early Exploration of TSV Placement Topologies in 3D Stacked ICs
    R. Jagtap; S.S. Kumar; T.G.R.M. van Leuken;
    In 15th Euromicro Conference on Digital System Design,
    Cesme, Turkey, September 2012.

  57. System Fault-tolerance Analysis of Small Satellite On-board Computers
    D. Burlyaev; T.G.R.M. van Leuken;
    In XXVII Conference on Design of Circuits and Integrated Systems (DCIS 2012),
    Avignon, France, November 2012.

  58. 20th International Workshop, PATMOS 2010, Revised Selected Papers
    T.G.R.M. van Leuken; G. Sicard (Ed.);
    Berlin/Heidelberg: Springer, Volume 6448 in Lecture Notes in Computer Science, Theoretical Computer Science and General Issues, February 2011. DOI: DOI: 10.1007/978-3-642-17752-1

  59. High level Synthesis of Asynchronous Circuits from Data Flow Graphs
    R. van Leuken; T. van Leeuwen; H. Lincklaen Arriens;
    In Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation,
    Springer, September 2011. DOI: 10.1007/978-3-642-24154-3-32
    document

  60. A 3D network-on-chip for stacked-die transactional chip multiprocessors using through silicon vias
    S.S. Kumar; T.G.R.M. van Leuken;
    In 2011 6th Int. Conf. on Design and Technology of Integrated Systems in Nanoscale Era (DTIS),
    Athens, Greece, IEEE, pp. 1-6, April 2011.
    document

  61. TMFab--A Transactional Memory Fabric for Chip Multiprocessors
    S.S. Kumar; R. van Leuken;
    In Designing for Embedded Parallel Computing Platforms: Architectures, Design Tools, and Applications (DEPCP 2011),
    Grenoble, France, March 2011.

  62. A Fast and Accurate SystemC-AMS model for PLL
    K. Ma; R. van Leuken; M. Vidojkovic; J. Romme; S. Rampu; H. Pflug; Li Huang; G. Dolmans;
    In 18th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2011),
    Gliwice, Poland, pp. 411-416, June 2011. Print ISBN: 978-1-4577-0304-1.
    document

  63. A Scalable Distributed Asynchronous Control Network for High Level Synthesis of Digital Circuits
    T. van Leeuwen; R. van Leuken;
    In 14th Euromicro Conference on Digital System Design (DSD),
    Oulu, Finland, pp. 979-800, August 2011.
    document

  64. SystemC-AMS Model of a Dynamic Large-scale Satellite-based AIS-like Network
    Mu Zhou; R. van Leuken;
    In Forum on Specification, Verification and Design Languages (FDL 2011),
    Oldenburg, Germany, September 2011.
    document

  65. Extracting Behavior and Dynamically Generated Hierarchy from SystemC Models
    H. Broeders; T.G.R.M. van Leuken;
    In 2011 48th ACM/EDAC/IEEE Design Automation Conference (DAC 2011),
    New York, NY, pp. 357-362, June 2011. Print ISBN: 978-1-4503-0636-2; ISSN: 0738-100x.
    document

  66. Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation
    J. Monteiro; R. van Leuken (Ed.);
    Berlin/Heidelberg: Springer, Volume 5953 in Lecture Notes in Computer Science, Theoretical Computer Science and General Issues, February 2010. ISBN 978-3-642-11801-2, ISSN 0302-9743. DOI: 10.1007/978-3-642-11802-9
    document

  67. Cooperative Communication with Grouped Relays for Zero-Padding MB-OFDM
    T. Xu; H. Lu; H. Nikookar; R. van Leuken;
    In Proc. 2010 IEEE International Conference on Information Theory and Information Security (ICITIS'10),
    Beijing, China, December 2010.
    document

  68. MB-LITE: A Robust, Light-Weight Soft-Core Implementation of the MicroBlaze Architecture
    T. Kranenburg; R. van Leuken;
    In Design, Automation and Test in Europe Conference and Exhibition (DATE 2010),
    pp. {997-1000} addr, March 2010.
    document

  69. A Precise SystemC-AMS Model For Charge Pump Phase Lock Loop With Multiphase Output
    Tao Xu; R. van Leuken; H. Lincklaen Arriens; A. de Graaf;
    In IEEE 8th Int. Conf. on ASIC (Asicon),
    Changsha (China), IEEE, October 2009.
    document

  70. A Precise System-C-AMS model for charge pump phase lock loop verified by its CMOS circuit
    Tao Xu; H. Lincklaen Arriens; R. van Leuken; A. de Graaf;
    In 20th annual workshop on circuits, systems and signal processing--ProRISC,
    Veldhoven, STW, pp. 412-417, November 2009. ISBN 978-90-73461-62-8.
    document

  71. Modeling a configurable resistive touch screen system using SystemC and SystemC-AMS
    Mu Zhou; R. van Leuken; H.J. Lincklaen Arriens;
    In 20th annual workshop on circuits, systems and signal processing--ProRISC,
    Veldhoven, STW, pp. 393-398, November 2009. ISBN 978-90-73461-62-8.
    document

  72. A hardware platform for delay hopped transmitted reference UWB communication system prototype development
    Y. Wang; A. Schranzhofer; R. van Leuken; A.J. van der Veen;
    In IEEE/ProRISC workshop on Circuits, Systems and Signal Processing,
    Veldhoven (NL), IEEE, pp. 272-275, November 2007. ISBN 978-90-73461-49-9.
    document

  73. Design of a Practical Scheme for Ultra Wideband Communication
    Y. Wang; A.J. van der Veen; R. van Leuken;
    In Proc. IEEE ISCAS,
    Kos (GR), IEEE, May 2006.
    document

  74. A multistandard FFT processor for wireless system-on-chip implementations
    R. Chidambaram; R. van Leuken; M. Quax; I. Held; J. Huisken;
    In Proc. IEEE ISCAS,
    Kos (GR), IEEE, May 2006.
    document

  75. LT codes for reliable network on chip communications
    H. Wang; R. van Leuken;
    In Proc. 17th annual workshop on Circuits, Systems and Signal Processing (ProRISC),
    Veldhoven (NL), pp. 214-215, November 2006.
    document

  76. An advanced cache power model for an embedded processor using SLEEP methodology
    J. Chen; Y. Xu; R. van Leuken;
    In Proc. 17th annual workshop on Circuits, Systems and Signal Processing (ProRISC),
    Veldhoven (NL), pp. 247-248, November 2006.
    document

  77. A high-level design and implementation platform for IP prototyping on FPGA platforms
    R. van Leuken; A.C. de Graaf; H. Lincklaen-Arriens;
    In Prorisc'04,
    Veldhoven, November 2004.

  78. A High-level Design and Implementation Platform for IP Prototyping on FPGA
    T.G.R. van Leuken; A.C. de Graaf; H.J. Lincklaen Arriens;
    In ProRISC IEEE 15th Annual Workshop on Circuits, Systems and Signal Processing,
    Veldhoven, the Netherlands, pp. 68-71, November 2004.
    document

  79. European Low Power Initiative for Electronic System Design; Designing CMOS for low power
    R. van Leuken; R. Nouta; A. de Graaf (Ed.);
    Kluwer academic publishers, , 2002. ISBN 1-4020-7234-1.

  80. General Purpose Prototyping Platform for Data Processor Research and Development
    F. Miletic; R. van Leuken; A. de Graaf;
    In Proc. Field Programmable Logic and Applications (FPL 2002),
    Montpellier (France), September 2002.

  81. A Design Platform for Fast Prototyping of Data-processors
    F. Miletic; R. van Leuken; A. de Graaf;
    In Proceedings 17th Conference on Design of Circuits and Integrated Systems (DCIS 2002),
    Santander (Spain), pp. 119-125, November 2002.

  82. Vers des systemes elektronique a basse puissance au quotidien, la micro-electronique a basse puissance, pourquoi et comment?
    R. van Leuken; R. Nouta;
    Elektor, Electronique et Micro-Informatique,
    Issue 272, pp. 70-75, February 2001.

  83. Auf dem weg zu Low-Power-Elektronik-Systemen im Alltag, Low-Power-Mikroelektronique: Warum und wie?
    R. van Leuken; R. Nouta;
    Elektor, Elektronik und Computertechnik,
    Issue 4, pp. 56-60, April 2001.

  84. Towards low-power everyday electronic systems, low-power microelectronics, why and how?
    R. van Leuken; R. Nouta;
    Elektor, The Electronics and Computer Magazine,
    pp. 10-15, July-August 2001.

  85. De ontwikkeling van low-power systemen, het hoe en waarom van low-power elektronica
    R. van Leuken; R. Nouta;
    Elektuur, elektronica en computertechniek,
    Volume 451, pp. 58-63, May 2001.

  86. European Low Power Initiative for Electronic System Design; low power design Techniques and CAD tools for analog and RF integrated circuits
    R. van Leuken; R. Nouta; A. de Graaf (Ed.);
    Kluwer, , 2001. 294 pages. ISBN 0-7923-7432-0.

  87. European Low Power Initiative for Electronic System Design; Principles of Asynchronous Circuit Design, A systems perspective
    R. van Leuken; R. Nouta; A. de Graaf (Ed.);
    Kluwer, , 2001. 360 pages. ISBN 0-7923-7613-7.

  88. 4th International Workshop of the European Low Power Initiative for Electronic System Design
    R. van Leuken; R. Nouta; A. de Graaf (Ed.);
    Yverdon (Switzerland): , September 2001. 157 pages. ISBN 90-5326-038-2.

  89. Electronique, 1e partie, La consommation de ``basse puissance'' dans les systemes electroniques
    R. van Leuken; R. Nouta; T. Prichard;
    La Revue Polytechnique,
    Issue 9, pp. 520-522, September 2000.

  90. Electronique, 2e partie, La consommation de ``basse puissance'' dans les systemes electroniques utilises au quotidien
    R. van Leuken; R. Nouta; T. Prichard;
    La Revue Polytechnique,
    Issue 10, pp. 611-613, October 2000.

  91. Motivation, context and objectives
    F. Catthoor; R. van Leuken; R. Nouta; A. de Graaf;
    In Unified low-power design flow for data-dominated multi-media and telecom appliocations,
    Dordrecht, Kluwer, 2000. 180 pages. ISBN 0-7923-7947-0.

  92. Low power design in Europe: a novel knowledge sharing action
    R. van Leuken; R. Nouta; A. de Graaf; M. Kouwenhoven; C. Verhoeven;
    In Design, Automation and Test in Europe Conference 2000--user forum,
    Paris (F), March 2000.

  93. Constraints, Hurdles and Opportunities for a Successful European Take-Up Action
    R. van Leuken; R. Nouta; A. de Graaf;
    In Proc. 10th International Workshop, PATMOS 2000,
    Gottingen (G), pp. 1-2, September 2000.

  94. Ontwikkelingen Chiptechnologie
    R. van Leuken;
    In ENERGIEverbruik van DATAhotels en Telecom SWITCHES,
    Amsterdam, November 2000.

  95. 3rd International Workshop of the European Low power Initiative for Electronic System Design
    R. van Leuken; R. Nouta; A. de Graaf (Ed.);
    Rapallo (I): , July 2000. 298 pages. ISBN 90-5326-036-6.

  96. 1st Int. workshop of the European Low power Initiative for Electronic System Design
    R. van Leuken; R. Nouta; A. de Graaf (Ed.);
    Como (I): , March 1999. ISBN 90 5326 035 8. 76 pages..

  97. 2nd Int. workshop of the European Low power Initiative for Electronic System Design
    R. van Leuken; R. Nouta; A. de Graaf (Ed.);
    Kos (Gr): , October 1999. ISBN 90 5326 034 X. 160 pages..

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