Department of Microelectronics
Faculty of Electrical Engineering, Mathematics, and Computer Science

Jiang Gong

Publications

  1. A Low-Spur Fractional-N PLL Based on a Time-Mode Arithmetic Unit
    Gao, Zhong; He, Jingchu; Fritz, Martin; Gong, Jiang; Shen, Yiyu; Zong, Zhirui; Chen, Peng; Spalink, Gerd; Eitel, Ben; Alavi, Morteza S.; Staszewski, Robert Bogdan; Babaie, Masoud;
    IEEE Journal of Solid-State Circuits,
    pp. 1-20, 2022. DOI: 10.1109/JSSC.2022.3209338

  2. A 2.6-to-4.1GHz Fractional-N Digital PLL Based on a Time-Mode Arithmetic Unit Achieving -249.4dB FoM and -59dBc Fractional Spurs
    Gao, Zhong; He, Jingchu; Fritz, Martin; Gong, Jiang; Shen, Yiyu; Zong, Zhirui; Chen, Peng; Spalink, Gerd; Eitel, Ben; Yamamoto, Ken; Staszewski, Robert Bogdan; Alavi, Morteza S.; Babaie, Masoud;
    In 2022 IEEE International Solid- State Circuits Conference (ISSCC),
    pp. 380-382, 2022. DOI: 10.1109/ISSCC42614.2022.9731561

  3. A Fractional-N Digitally Intensive PLL Achieving 428-fs Jitter and<-54-dBc Spurs Under 50-mV \$ \_ \pp\ \$ Supply Ripple
    Chen, Yue; Gong, Jiang; Staszewski, Robert Bogdan; Babaie, Masoud;
    IEEE Journal of Solid-State Circuits,
    2021.

  4. Equalization of OSDM over Time-Varying Channels Based on Diagonal-Block-Banded Matrix Enhancement
    Jing Han; Yujie Wang; Zehui Gong; G. Leus;
    Signal Processing,
    Volume 168, pp. 107333, March 2020.

  5. A 10-to-12 GHz 5 mW Charge-Sampling PLL Achieving 50 fsec RMS Jitter, -258.9 dB FOM and -65 dBc Reference Spur
    Gong, Jiang; Sebastiano, Fabio; Charbon, Edoardo; Babaie, Masoud;
    In 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
    pp. 15-18, 2020. DOI: 10.1109/RFIC49505.2020.9218380

  6. 19.3 A 200dB FoM 4-to-5GHz Cryogenic Oscillator with an Automatic Common-Mode Resonance Calibration for Quantum Computing Applications
    Gong, Jiang; Chen, Yue; Sebastiano, Fabio; Charbon, Edoardo; Babaie, Masoud;
    In 2020 IEEE International Solid- State Circuits Conference - (ISSCC),
    pp. 308-310, 2020. DOI: 10.1109/ISSCC19947.2020.9062913

  7. Benefits and challenges of designing cryogenic CMOS RF circuits for quantum computers
    Mehrpoo, M; Patra, B; Gong, J; van Dijk, JPG; Homulle, H; Kiene, G; Vladimirescu, A; Sebastiano, F; Charbon, E; Babaie, M; others;
    In 2019 IEEE International Symposium on Circuits and Systems (ISCAS),
    IEEE, pp. 1--5, 2019.

  8. A 1.33 mW, 1.6 ps rms-Integrated-Jitter, 1.8-2.7 GHz Ring-Oscillator-Based Fractional-N Injection-Locked DPLL for Internet-of-Things Applications
    Gong, Jiang; He, Yuming; Ba, Ao; Liu, Yao-Hong; Dijkhuis, Johan; Traferro, Stefano; Bachmann, Christian; Philips, Kathleen; Babaie, Masoud;
    In 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),
    IEEE, pp. 44--47, 2018.

  9. Time estimation with multichannel digital silicon photomultipliers
    E. Venialgo; S. Mandai; T. Gong; D.R. Schaart; E. Charbon;
    Physics in Medicine and Biology,
    Volume 60, Issue 6, pp. 2435-2452, Mar. 2015. DOI: 10.1088/0031-9155/60/6/2435
    document

  10. A 67,392 SPAD PVTB-Compensated Multi-Channel Digital SiPM with 432 Column-Parallel 48ps 17-bit TDCs for Endoscopic Time-of-flight PET
    A.J. Carimatto; S. Mandai; E. Venialgo; T. Gong; G. Borghi; D. Schaart; E. Charbon;
    In IEEE International Solid-State Circuits Conference,
    Feb. 2015.
    document

  11. Practical Time Mark Estimators for Multichannel Digital Silicon Photomultipliers
    E. Venialgo; S. Mandai; T. Gong; D. Schaart; E. Charbon;
    In IEEE Nuclear Science Symposium,
    Nov. 2015.
    document

  12. FPGA Based Fast Gamma-Ray Time Mark Estimator for Ultra-Miniature Endoscopic PET Applications
    T. Gong; S. Mandai; E. Venialgo; A.J. Carimatto; E. Charbon;
    In IEEE Nuclear Science Symposium,
    Nov. 2014.

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