Agenda

PhD Thesis Defence

• Tuesday, 19 November 2019
• 14:30
• Aula Senaatszaal

Capacitively-Coupled Bridge Readout Circuits

This Ph.D. dissertation describes the design and realization of energy efficient readout integrated circuits (ROICs), that have an input referred noise density < 5 nV/√Hz and a linearity of < 30 ppm, as required by Wheatstone bridge sensors used in precision mechatronic systems. Novel techniques were developed, at both the system-level and circuit-level, to improve the ROIC’s energy-efficiency, while preserving its stability and precision. Two prototypes are presented, each with best-in-class energy efficiency, to demonstrate the effectiveness of the proposed techniques.

Overview of PhD Thesis Defence