Openings at ME

Student Assistant for development of course Y1 Q1 EE1D11 "Digital Systems A"

Student Assistant to Help to Develop Course Material for Digital Systems A (Y1 Q1 BSc. EE)
Required Level: Bachelor or Master student
Function workload: 10 – 40 hrs per week (May/June – September 2023, this might be a bit flexible)
Salary: Depending on number of ECTS achieved

Function Description and Details

We look for a number of TAs for this vacancy. The amount of hours for each TA can go up to 320 hours (the number of hours for each TA will depend on various factors and will be decided during the TA selection).

- Converting existing course lab assignments from VHDL to Verilog, including updating the manual.
- Developing some additional lab assignments, including creating / updating the manual.

- Converting existing VHDL related gated practice assignments to Verilog.
- Creating new gated practice assignments for material from DS-B that now becomes part of DS-A.
These tasks will be done in collaboration with the teachers of DS-A.

Requirements and employment conditions

• Bachelor or Master student
• Active FlexDelft account (if you do not have one, you can ask for one at FlexDelft offices)
• For non-european union international students, to have a valid working permit at least two weeks before the start of the first session (FlexDelft can arrange the working permit for you)
• Remuneration is on basis of your study points (ECTS) achieved and conform to the Collective Labour Agreement (CAO) of Dutch Universities

Application

To apply please be sure you have read the requirements and use the following link to the application form.

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