MSc thesis project proposal

[2023] Fully Integrated Circuits and Systems for Vibration Energy Harvesting

Reliability is crucial for wind turbines. To support heavy rotating blades, main shaft bearings continuously take force up to, equivalently, hundreds of tons. For reliable operation, in-bearing smart sensors are implemented to collect reliability-related data. These sensors are powered by batteries, typically lasting for a few months. After then, they need to be replaced to maintain sensor operation. However, battery replacement means disassembling turbine blades to reach main-shaft bearings, which costs significant time, manpower, and money. In this project will develop a power solution using energy harvesting technology, which realizes fully-autonomous in-bearing sensors in the smart rollers in giant wind turbines.

To realize this target, we are going to design a piezoelectric energy harvesting system, which can harvest the mechanical energy inside the steel roller while achieving high reliability, high output power, and regulated output voltage. We are going to design a novel fully integrated energy harvesting IC using on-chip flying capacitors to minimize the system form factor while achieving great performance. In this project, we'll work closely with experienced researchers/engineers in the SKF, the world's largest bearing manufacturer, which developed the first smart sensor bearings for wind turbines. 


[1] Y. K. Ramadass and A. P. Chandrakasan, "An Efficient Piezoelectric Energy Harvesting Interface Circuit Using a Bias-Flip Rectifier and Shared Inductor," IEEE Journal of Solid-State Circuits, vol. 45, no. 1, pp. 189-204, 2010, doi: 10.1109/JSSC.2009.2034442.

[2] S. Du and A. A. Seshia, "An Inductorless Bias-Flip Rectifier for Piezoelectric Energy Harvesting," IEEE Journal of Solid-State Circuits, vol. 52, no. 10, pp. 2746-2757, 2017, doi: 10.1109/JSSC.2017.2725959.


1. Literature review of piezoelectric energy harvesting integrated circuits and systems.

2. Design a highly efficient, fully integrated interface circuit in 180nm BCD technology. Tape-out is possible depending on the design and available time.


You should be familiar with analog IC design and Cadence environment. If you are interested, please send your CV, BSc transcripts, and MSc grades (obtained to date) to Sijun Du at email:


dr. Sijun Du

Electronic Instrumentation Group

Department of Microelectronics

Last modified: 2023-09-19