Design of SiC CMOS Integrated Circuit for High-temperature Applications

The integrated circuit (IC) is increasingly being applied to harsh environments, such as high temperatures. However, at such temperatures, conventional silicon (Si) based circuits cannot function anymore due to its physical limitation. Therefore, an alternative IC technology has to be found to resolve the problem.

Within ECTM and EI group, wide band gap (WBG) semiconductor materials, i.e., Silicon carbide (SiC), are being investigated. This compound material has numerous advantages over silicon technology, and the most important feature is that SiC devices keep showing electronics behavior even at elevated temperature above 500°C. In the past decades, SiC has been widely used in power electronics. However, for low-power circuits, SiC is still in the pre-mature phase. 

In this project, you will get a unique chance to design ICs with the exotic SiC CMOS technology enabling ICs to work in elevated temperatures. This CMOS technology is provided by Fraunhofer Institute for Integrated System and Device Technology (IISB) in Germany and is unique throughout Europe. The advantage of this project is that you will have a tape-out opportunity at the end of 2022. Also, since this technology is still under development, the scientific result will be highly suitable for publications.
 

Assignment

The student will finish the project in collaboration with EI and ECTM group
Duration: 9~12 months.

In this project, you are expected to do the following things:

• Have a deep understanding of SiC CMOS process. Literature study of  state-of-the-art SiC circuits, for example, amplifier, bandgap reference, ADC.
• Design and simulate the circuit with model provided by Fraunhofer IISB.
• Design the circuit layout with L-edit, carry out layout versus schematic (LVS) check, and design rule check (DRC).
• Provide a scheme for characterization of the circuit.
• The rest of the time for the project is quite free. You will have the freedom to either characterize SiC device from the last run, or to dig into the modeling of SiC CMOS. 
• Last but no least, a well-written thesis is needed. 
   

Requirements

The candidate should:

• Have a good understanding of CMOS circuit design;
• Have a good understanding of CMOS fabrication process;
• Be a team player as well as an independent researcher. 
   

Contact

Last modified: 2022-03-02