MSc thesis project proposal

VCSEL driver for 1D-TOF systems

The 3D image sensor product features Time-of-Flight (ToF) function, by using the state-of-art back-side illuminated (BSI) and Near infrared (NIR) enhancement technology, which enables high precision, small pixel, high resolution and low power features in one fully integrated chip. This 3D image sensor can be widely applied in artificial intelligence, facial recognition, self-driving cars, 3D modelling, fast movement capture, and machine vision. The ToF sensor and 3D imaging system are expected to create a very promising market prospect being widely used in mobile, surveillance and automotive industries.

The 1D time-of-flight (TOF) sensor is mainly used for distance measurement. It is widely used in automotive and consumer electronics. The idea of D-TOF system is simple, the system shoots a laser pulse and by measure the time between the transmit pulse (TX) and receive pulse (RX), we know the distance. One challenge of 1D-TOF sensor is that the TX part and RX part of the sensor is combined in one module, as a result, a compact laser source, namely vertical-cavity surface-emitting laser (VCSEL) needs to be used. What’s more, the VCSEL driver needs to be designed and combined with the rest of the sensor chip in CMOS technology.

The main challenges in designing the VCSEL driver are, to fast switch on/off (in tens of picoseconds), to provide a high peak current (hundreds of mA) for the VCSEL as well as low jitter (in tens of picoseconds) in the switching time. These are the key features to ensure a high-precision, low-powered and long-distance 3D image sensor.

Your Job is to closely work with senior engineers to develop a novel VCSEL driver suitable for 1D-TOF system with following specs:

  • Charge pump voltage 12V
  • Peak current is 250mA
  • Max duty cycle is 2%
  • Out frequency 40MHz
  • Driver supply voltage is 3.3V or 5V
  • Implement the design with 55nmBCD technology
  • Measure the real behavior of the VCSEL driver (tape out possible)

You are expected to be:

  • familiar with analog CMOS circuit design using Cadence
  • experience in VCSEL driver design is a plus
  • strong communications, documentation, and presentation skills
  • highly self-motivated and enjoying solving difficult challenges
  • currently enrolled in or entering a Master's degree program in Electrical Engineering, Computer Engineering, or related fields.

Financial support is available for this project.

Contact

dr. Sijun Du

Electronic Instrumentation Group

Department of Microelectronics

Last modified: 2021-11-11