Agenda
MSc BME Thesis Presentation
- Tuesday, 25 October 2016
- 10:00-11:00
- Lipkenszaal, EWI LB01.150
aEEG analog front-end IC for neonatal brain development monitoring
Maciej KostalkowskiAbstract:
Every year number of prematurely born infants grows. Most underdeveloped organ after birth is brain.
Therefore its monitoring is very important, especially as it can provide indications about health state
in a future, both short and long term. Non invasive method of brain monitoring is aEEG recording.
Although aEEG is already well known and accepted in neonatology, it is still not used to monitor every patient. Problem is high price of a device starting from 30000 euro. In a result, hospital is not able to provide proper monitoring for each and every patient. For this reason, main task of this thesis is to propose cheaper version of a system.
In order to propose cheap design, minimal requirements have to be specified. Two tests were performed.
First one was to identify interferences disturbing aEEG recording. Only registered interference was 50Hz spike coming from the mains. Noise floor peak to peak amplitude was measured on 1μV level, while magnitude of 50Hz spike was on the level of 9μV for devices turned off and 25μV for devices turned on.
Second performed test was resolution test. Test showed that in order to keep the number of bits low, amplification of the signal is required. Amplification by factor of 1000 allowed to reduced this value to 7bits.
Proposed system consists of amplifying stage realising 60dB gain with high pass cut off filtration
and ADC. Amplifying stage is realised by amplifier providing 35dB gain with filtration below 2Hz and second amplifier realising 25dB gain. ADC is implemented by continuous time second order Sigma Delta Modulator. Proposed system was designed in CMOS 0.18μ and h18a6am technology. Tests of full system showed SNR no lower than 51dB, power consumption of 217.5μV. Input stage has CMRR of 113dB and input impedance above 2.25GΩ for the bandwidth 2-15Hz. System reliability was checked with corner analysis and wide range of temperatures. Results showed small variations of SNR.
Agenda
- Tue, 9 Apr 2024
- Pavia, Italy
32nd Workshop on Advances in Analog Circuit Design
32nd Workshop on Advances in Analog Circuit Design
The aim of the Workshop on Advances in Analog Circuit Design (AACD) is to bring together a large group of people working at the frontiers of analog circuit design, to study and discuss possibilities and future developments.
- Mon, 15 Apr 2024
- 15:00
- Aula Senaatszaal
PhD Thesis Defence
Huajun Zhang
High-Performance Multilevel Class-D Audio Amplifiers
- 25 -- 26 Apr 2024
- San Diego, CA, USA
IEEE Sensor Interfaces Meeting 2024
IEEE Sensor Interfaces Meeting 2024
- Mon, 6 May 2024
- 12:30
- Aula Senaatszaal
PhD Thesis Defence
Christoph Manss
Multi-agent exploration under sparsity constraints
- 27 -- 28 May 2024
- Aula, TU Delft
Conferences
44th Benelux Symposium on Information Theory and Signal Processing (SITB'24, Delft)
- Tue, 18 Jun 2024
- 15:00
- Aula Senaatszaal
PhD Thesis Defence
Hanie Moghaddasi
Model-based feature engineering of atrial fibrillation
- Mon, 24 Jun 2024
- Aula, TU Delft
Conferences
7th Graph Signal Processing Workshop (GSP 2024)
- Wed, 10 Jul 2024
- 10:00
- Aula Senaatszaal